from:	Jonathan Weintroub 
to:	Mark Gurwell 
cc:	"Young, Ken" ,
Qizhou Zhang ,
Glen Petitpas ,
Chunhua Qi ,
David Wilner ,
Jun-Hui Zhao ,
Nimesh Patel ,
Eric Keto ,
"Force, Brian" ,
Rurik Primiani 
date:	Mon, Aug 3, 2015 at 11:50 AM
subject:	Re: Next Quadrant of SWARM


Hi Mark and all,

This is quite a long thread, and I won’t address every point.  I will make a couple of remarks in response the concern evident in Mark’s  response.

First, the building of the second quadrant and the pursuit of faster (10/11 and 11/11 bit codes) are activities that are proceeding in parallel, and should do so.  Buildout is a matter or ordering the bits and pieces, testing them, getting them to the SMA, installing and commissioning, with the help of whatever technical staff are available.  All fairly tractable and predicable mechanical tasks given that we have the first quadrant as a working model, and a prepared rack with plenums etc for airflow ready and waiting.  The bit code speedup task has a lot more “hair” and it is harder to pin down the exact schedule, but please be assured, it is the top priority at all times, and is not being sidelined by the second quadrant build out.

Second, completion of the second quadrant will not trigger the shut down of the ASIC correlator.  When the third quadrant is ready to install,  there may be a certain amount of pressure to liberate one of the racks occupied by the ASIC correlator, which in turn might motivate to shut down a single block, or 1/6 of the ASIC bandwidth.  But that decision, or a decision for more radical ASIC correlator shut down will only be made with across the board consultation and discussion, and clear understanding of the operation status of, and data quality from, SWARM.

There may be other motivations to shut down the ASIC such as power consumption, PACU capacity and reliability, etc, but there is no move to “terminate with extreme prejudice” before it is prudent to do so.

Best,

Jonathan